两块 ESP32-S3-WROOM-1-N16R8 图传板(DVP 接口接 OV2640/OV3660/OV5640), 向队伍客户端与裁判终端推 UDP 图传。固件是跑在 ESP-IDF 上的 Rust,用官方 esp32-camera 组件采集;客户端是 Rust + Slint 桌面程序。 三个 crate 各自独立构建: . firmware,交叉编译到 Xtensa protocol/ 线路格式与帧重组,两端共用,无 ESP-IDF 依赖,有单元测试 client/ Slint 桌面客户端 视频走 UDP 而非 TCP:实测传感器产出 22 fps,TCP MJPEG 只送出 1.9 fps, 且只占用链路能力的 1%——链路是空的,帧堵在队头阻塞后面等一个实时画面 等不起的重传计时器。改为独立数据报、不重传、缺片丢整帧后达到 20.8 fps。 发现是双向的:板子每 2 秒广播 Hello,客户端广播 Subscribe,板子据此定向 推流。板子身份由 MAC 派生,重启不变,所以客户端可以把绑定存进配置。 裁判端同时收两块板子(每个发送方一个重组器),队伍端绑定其中一块并只显示 自己那一边的血量。装甲板接口已预留(ArmorSource trait + ARMOR_PORT), 当前无数据源,界面显示占位符。 vendor 了 esp32-camera 2.1.7:组件注册表的版本求解器找不到它,且需要打一处 补丁(见 components/esp32-camera/target/esp32s3/ll_cam.c)。 .gitignore 三条 target/ 都锚定在根目录,因为 protocol/ 与 client/ 各自也是 独立 crate;而 components/esp32-camera/target/ 是上游的按芯片分目录,里面是 源码,必须保留。
252 lines
8.5 KiB
C
252 lines
8.5 KiB
C
/*
|
|
* This file is part of the OpenMV project.
|
|
* Copyright (c) 2013/2014 Ibrahim Abdelkader <i.abdalkader@gmail.com>
|
|
* This work is licensed under the MIT license, see the file LICENSE for details.
|
|
*
|
|
* SCCB (I2C like) driver.
|
|
*
|
|
*/
|
|
|
|
#include <stdbool.h>
|
|
#include <string.h>
|
|
#include <freertos/FreeRTOS.h>
|
|
#include <freertos/task.h>
|
|
#include "sccb.h"
|
|
#include "sensor.h"
|
|
#include <stdio.h>
|
|
#include "sdkconfig.h"
|
|
#if defined(ARDUINO_ARCH_ESP32) && defined(CONFIG_ARDUHAL_ESP_LOG)
|
|
#include "esp32-hal-log.h"
|
|
#else
|
|
#include "esp_log.h"
|
|
static const char* TAG = "sccb";
|
|
#endif
|
|
|
|
#define LITTLETOBIG(x) ((x<<8)|(x>>8))
|
|
|
|
#include "driver/i2c.h"
|
|
|
|
// support IDF 5.x
|
|
#ifndef portTICK_RATE_MS
|
|
#define portTICK_RATE_MS portTICK_PERIOD_MS
|
|
#endif
|
|
|
|
#define SCCB_FREQ CONFIG_SCCB_CLK_FREQ /*!< I2C master frequency*/
|
|
#define WRITE_BIT I2C_MASTER_WRITE /*!< I2C master write */
|
|
#define READ_BIT I2C_MASTER_READ /*!< I2C master read */
|
|
#define ACK_CHECK_EN 0x1 /*!< I2C master will check ack from slave*/
|
|
#define ACK_CHECK_DIS 0x0 /*!< I2C master will not check ack from slave */
|
|
#define ACK_VAL 0x0 /*!< I2C ack value */
|
|
#define NACK_VAL 0x1 /*!< I2C nack value */
|
|
#if CONFIG_SCCB_HARDWARE_I2C_PORT1
|
|
const int SCCB_I2C_PORT_DEFAULT = 1;
|
|
#else
|
|
const int SCCB_I2C_PORT_DEFAULT = 0;
|
|
#endif
|
|
|
|
static int sccb_i2c_port;
|
|
static bool sccb_owns_i2c_port;
|
|
|
|
int SCCB_Init(int pin_sda, int pin_scl)
|
|
{
|
|
ESP_LOGI(TAG, "pin_sda %d pin_scl %d", pin_sda, pin_scl);
|
|
i2c_config_t conf;
|
|
esp_err_t ret;
|
|
|
|
memset(&conf, 0, sizeof(i2c_config_t));
|
|
|
|
sccb_i2c_port = SCCB_I2C_PORT_DEFAULT;
|
|
sccb_owns_i2c_port = true;
|
|
ESP_LOGI(TAG, "sccb_i2c_port=%d", sccb_i2c_port);
|
|
|
|
conf.mode = I2C_MODE_MASTER;
|
|
conf.sda_io_num = pin_sda;
|
|
conf.sda_pullup_en = GPIO_PULLUP_ENABLE;
|
|
conf.scl_io_num = pin_scl;
|
|
conf.scl_pullup_en = GPIO_PULLUP_ENABLE;
|
|
conf.master.clk_speed = SCCB_FREQ;
|
|
|
|
if ((ret = i2c_param_config(sccb_i2c_port, &conf)) != ESP_OK) {
|
|
return ret;
|
|
}
|
|
|
|
return i2c_driver_install(sccb_i2c_port, conf.mode, 0, 0, 0);
|
|
}
|
|
|
|
int SCCB_Use_Port(int i2c_num) { // sccb use an already initialized I2C port
|
|
if (sccb_owns_i2c_port) {
|
|
SCCB_Deinit();
|
|
}
|
|
if (i2c_num < 0 || i2c_num > I2C_NUM_MAX) {
|
|
return ESP_ERR_INVALID_ARG;
|
|
}
|
|
sccb_i2c_port = i2c_num;
|
|
sccb_owns_i2c_port = false; // in this case, camera doesn't own the i2c port
|
|
return ESP_OK;
|
|
}
|
|
|
|
int SCCB_Deinit(void)
|
|
{
|
|
if (!sccb_owns_i2c_port) {
|
|
return ESP_OK;
|
|
}
|
|
sccb_owns_i2c_port = false;
|
|
return i2c_driver_delete(sccb_i2c_port);
|
|
}
|
|
|
|
int SCCB_Probe(uint8_t slv_addr)
|
|
{
|
|
i2c_cmd_handle_t cmd = i2c_cmd_link_create();
|
|
i2c_master_start(cmd);
|
|
i2c_master_write_byte(cmd, ( slv_addr << 1 ) | WRITE_BIT, ACK_CHECK_EN);
|
|
i2c_master_stop(cmd);
|
|
esp_err_t ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
|
|
i2c_cmd_link_delete(cmd);
|
|
return ret;
|
|
}
|
|
|
|
uint8_t SCCB_Read(uint8_t slv_addr, uint8_t reg)
|
|
{
|
|
uint8_t data=0;
|
|
esp_err_t ret = ESP_FAIL;
|
|
i2c_cmd_handle_t cmd = i2c_cmd_link_create();
|
|
i2c_master_start(cmd);
|
|
i2c_master_write_byte(cmd, ( slv_addr << 1 ) | WRITE_BIT, ACK_CHECK_EN);
|
|
i2c_master_write_byte(cmd, reg, ACK_CHECK_EN);
|
|
i2c_master_stop(cmd);
|
|
ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
|
|
i2c_cmd_link_delete(cmd);
|
|
if(ret != ESP_OK) return -1;
|
|
cmd = i2c_cmd_link_create();
|
|
i2c_master_start(cmd);
|
|
i2c_master_write_byte(cmd, ( slv_addr << 1 ) | READ_BIT, ACK_CHECK_EN);
|
|
i2c_master_read_byte(cmd, &data, NACK_VAL);
|
|
i2c_master_stop(cmd);
|
|
ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
|
|
i2c_cmd_link_delete(cmd);
|
|
if(ret != ESP_OK) {
|
|
ESP_LOGE(TAG, "SCCB_Read Failed addr:0x%02x, reg:0x%02x, data:0x%02x, ret:%d", slv_addr, reg, data, ret);
|
|
}
|
|
return data;
|
|
}
|
|
|
|
int SCCB_Write(uint8_t slv_addr, uint8_t reg, uint8_t data)
|
|
{
|
|
esp_err_t ret = ESP_FAIL;
|
|
i2c_cmd_handle_t cmd = i2c_cmd_link_create();
|
|
i2c_master_start(cmd);
|
|
i2c_master_write_byte(cmd, ( slv_addr << 1 ) | WRITE_BIT, ACK_CHECK_EN);
|
|
i2c_master_write_byte(cmd, reg, ACK_CHECK_EN);
|
|
i2c_master_write_byte(cmd, data, ACK_CHECK_EN);
|
|
i2c_master_stop(cmd);
|
|
ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
|
|
i2c_cmd_link_delete(cmd);
|
|
if(ret != ESP_OK) {
|
|
ESP_LOGE(TAG, "SCCB_Write Failed addr:0x%02x, reg:0x%02x, data:0x%02x, ret:%d", slv_addr, reg, data, ret);
|
|
}
|
|
return ret == ESP_OK ? 0 : -1;
|
|
}
|
|
|
|
uint8_t SCCB_Read16(uint8_t slv_addr, uint16_t reg)
|
|
{
|
|
uint8_t data=0;
|
|
esp_err_t ret = ESP_FAIL;
|
|
uint16_t reg_htons = LITTLETOBIG(reg);
|
|
uint8_t *reg_u8 = (uint8_t *)®_htons;
|
|
i2c_cmd_handle_t cmd = i2c_cmd_link_create();
|
|
i2c_master_start(cmd);
|
|
i2c_master_write_byte(cmd, ( slv_addr << 1 ) | WRITE_BIT, ACK_CHECK_EN);
|
|
i2c_master_write_byte(cmd, reg_u8[0], ACK_CHECK_EN);
|
|
i2c_master_write_byte(cmd, reg_u8[1], ACK_CHECK_EN);
|
|
i2c_master_stop(cmd);
|
|
ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
|
|
i2c_cmd_link_delete(cmd);
|
|
if(ret != ESP_OK) return -1;
|
|
cmd = i2c_cmd_link_create();
|
|
i2c_master_start(cmd);
|
|
i2c_master_write_byte(cmd, ( slv_addr << 1 ) | READ_BIT, ACK_CHECK_EN);
|
|
i2c_master_read_byte(cmd, &data, NACK_VAL);
|
|
i2c_master_stop(cmd);
|
|
ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
|
|
i2c_cmd_link_delete(cmd);
|
|
if(ret != ESP_OK) {
|
|
ESP_LOGE(TAG, "W [%04x]=%02x fail\n", reg, data);
|
|
}
|
|
return data;
|
|
}
|
|
|
|
int SCCB_Write16(uint8_t slv_addr, uint16_t reg, uint8_t data)
|
|
{
|
|
static uint16_t i = 0;
|
|
esp_err_t ret = ESP_FAIL;
|
|
uint16_t reg_htons = LITTLETOBIG(reg);
|
|
uint8_t *reg_u8 = (uint8_t *)®_htons;
|
|
i2c_cmd_handle_t cmd = i2c_cmd_link_create();
|
|
i2c_master_start(cmd);
|
|
i2c_master_write_byte(cmd, ( slv_addr << 1 ) | WRITE_BIT, ACK_CHECK_EN);
|
|
i2c_master_write_byte(cmd, reg_u8[0], ACK_CHECK_EN);
|
|
i2c_master_write_byte(cmd, reg_u8[1], ACK_CHECK_EN);
|
|
i2c_master_write_byte(cmd, data, ACK_CHECK_EN);
|
|
i2c_master_stop(cmd);
|
|
ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
|
|
i2c_cmd_link_delete(cmd);
|
|
if(ret != ESP_OK) {
|
|
ESP_LOGE(TAG, "W [%04x]=%02x %d fail\n", reg, data, i++);
|
|
}
|
|
return ret == ESP_OK ? 0 : -1;
|
|
}
|
|
|
|
uint16_t SCCB_Read_Addr16_Val16(uint8_t slv_addr, uint16_t reg)
|
|
{
|
|
uint16_t data = 0;
|
|
uint8_t *data_u8 = (uint8_t *)&data;
|
|
esp_err_t ret = ESP_FAIL;
|
|
uint16_t reg_htons = LITTLETOBIG(reg);
|
|
uint8_t *reg_u8 = (uint8_t *)®_htons;
|
|
i2c_cmd_handle_t cmd = i2c_cmd_link_create();
|
|
i2c_master_start(cmd);
|
|
i2c_master_write_byte(cmd, ( slv_addr << 1 ) | WRITE_BIT, ACK_CHECK_EN);
|
|
i2c_master_write_byte(cmd, reg_u8[0], ACK_CHECK_EN);
|
|
i2c_master_write_byte(cmd, reg_u8[1], ACK_CHECK_EN);
|
|
i2c_master_stop(cmd);
|
|
ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
|
|
i2c_cmd_link_delete(cmd);
|
|
if(ret != ESP_OK) return -1;
|
|
|
|
cmd = i2c_cmd_link_create();
|
|
i2c_master_start(cmd);
|
|
i2c_master_write_byte(cmd, ( slv_addr << 1 ) | READ_BIT, ACK_CHECK_EN);
|
|
i2c_master_read_byte(cmd, &data_u8[1], ACK_VAL);
|
|
i2c_master_read_byte(cmd, &data_u8[0], NACK_VAL);
|
|
i2c_master_stop(cmd);
|
|
ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
|
|
i2c_cmd_link_delete(cmd);
|
|
if(ret != ESP_OK) {
|
|
ESP_LOGE(TAG, "W [%04x]=%04x fail\n", reg, data);
|
|
}
|
|
return data;
|
|
}
|
|
|
|
int SCCB_Write_Addr16_Val16(uint8_t slv_addr, uint16_t reg, uint16_t data)
|
|
{
|
|
esp_err_t ret = ESP_FAIL;
|
|
uint16_t reg_htons = LITTLETOBIG(reg);
|
|
uint8_t *reg_u8 = (uint8_t *)®_htons;
|
|
uint16_t data_htons = LITTLETOBIG(data);
|
|
uint8_t *data_u8 = (uint8_t *)&data_htons;
|
|
i2c_cmd_handle_t cmd = i2c_cmd_link_create();
|
|
i2c_master_start(cmd);
|
|
i2c_master_write_byte(cmd, ( slv_addr << 1 ) | WRITE_BIT, ACK_CHECK_EN);
|
|
i2c_master_write_byte(cmd, reg_u8[0], ACK_CHECK_EN);
|
|
i2c_master_write_byte(cmd, reg_u8[1], ACK_CHECK_EN);
|
|
i2c_master_write_byte(cmd, data_u8[0], ACK_CHECK_EN);
|
|
i2c_master_write_byte(cmd, data_u8[1], ACK_CHECK_EN);
|
|
i2c_master_stop(cmd);
|
|
ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
|
|
i2c_cmd_link_delete(cmd);
|
|
if(ret != ESP_OK) {
|
|
ESP_LOGE(TAG, "W [%04x]=%04x fail\n", reg, data);
|
|
}
|
|
return ret == ESP_OK ? 0 : -1;
|
|
}
|