Horldsence
4f893ce140
两块 ESP32-S3-WROOM-1-N16R8 图传板（DVP 接口接 OV2640/OV3660/OV5640）， 向队伍客户端与裁判终端推 UDP 图传。固件是跑在 ESP-IDF 上的 Rust，用官方 esp32-camera 组件采集；客户端是 Rust + Slint 桌面程序。 三个 crate 各自独立构建： . firmware，交叉编译到 Xtensa protocol/ 线路格式与帧重组，两端共用，无 ESP-IDF 依赖，有单元测试 client/ Slint 桌面客户端 视频走 UDP 而非 TCP：实测传感器产出 22 fps，TCP MJPEG 只送出 1.9 fps， 且只占用链路能力的 1%——链路是空的，帧堵在队头阻塞后面等一个实时画面 等不起的重传计时器。改为独立数据报、不重传、缺片丢整帧后达到 20.8 fps。 发现是双向的：板子每 2 秒广播 Hello，客户端广播 Subscribe，板子据此定向 推流。板子身份由 MAC 派生，重启不变，所以客户端可以把绑定存进配置。 裁判端同时收两块板子（每个发送方一个重组器），队伍端绑定其中一块并只显示 自己那一边的血量。装甲板接口已预留（ArmorSource trait + ARMOR_PORT）， 当前无数据源，界面显示占位符。 vendor 了 esp32-camera 2.1.7：组件注册表的版本求解器找不到它，且需要打一处 补丁（见 components/esp32-camera/target/esp32s3/ll_cam.c）。 .gitignore 三条 target/ 都锚定在根目录，因为 protocol/ 与 client/ 各自也是 独立 crate；而 components/esp32-camera/target/ 是上游的按芯片分目录，里面是 源码，必须保留。
138 lines
5.9 KiB
C
138 lines
5.9 KiB
C
/*
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* GC0308 register definitions.
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* Based on GC0308 datasheet specifications
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*/
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#ifndef __GC0308_REG_REGS_H__
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#define __GC0308_REG_REGS_H__
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// System Control Registers
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#define RESET_RELATED 0xfe // Bit[7]: Software reset
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// Bit[6:5]: NA
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// Bit[4]: CISCTL_restart_n
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// Bit[3:1]: NA
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// Bit[0]: page select
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// 0:page0
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// 1:page1
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// Page 0 Registers
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// Exposure Control (Manual, when AEC disabled)
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#define EXPOSURE_HIGH 0x03 // Exposure time high byte (bits 11:4)
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#define EXPOSURE_LOW 0x04 // Exposure time low byte (bits 3:0 in upper nibble)
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// Total exposure = (EXPOSURE_HIGH << 4) | (EXPOSURE_LOW >> 4)
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// Range: 0-4095 (12-bit value)
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// Windowing Registers
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#define ROW_START_H 0x05 // Row start address high byte
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#define ROW_START_L 0x06 // Row start address low byte
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#define COL_START_H 0x07 // Column start address high byte
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#define COL_START_L 0x08 // Column start address low byte
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#define WIN_HEIGHT_H 0x09 // Window height high byte
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#define WIN_HEIGHT_L 0x0a // Window height low byte
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#define WIN_WIDTH_H 0x0b // Window width high byte
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#define WIN_WIDTH_L 0x0c // Window width low byte
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// Sensor Control
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#define CISCTL_MODE1 0x14 // Bit[1]: V_flip, Bit[0]: H_mirror
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// AAAA_EN - Auto Algorithm Enable (AEC/AGC/AWB/ABB)
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#define AAAA_EN 0x22 // Auto control enable register
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// Per Linux kernel driver:
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// Bit[0]: AEC enable (1=on, 0=off)
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// Bit[1]: AWB enable (1=on, 0=off)
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// Bit[2]: AGC enable (1=on, 0=off)
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// Note: This was previously incorrectly named AEC_MODE1
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// Special Effects and Output Control
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#define SPECIAL_EFFECT 0x23 // Special effect control
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// Bit[1:0]: Effect mode
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// 00: Normal
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// 01: Negative
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// 10: Grayscale/Color tint mode
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// Output Format
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#define OUTPUT_FMT 0x24 // Output format control
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// Bit[3:0]: Output format selection
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// 0010: YCbYCr (YUV422)
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// 0110: RGB565
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// others: see datasheet
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// Analog Circuit Control
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#define PCLK_DIV 0x28 // PCLK divider control (frequency division)
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// Output Control
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#define OUT_CTRL 0x2e // Output control
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// Bit[0]: Color bar enable
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// Global Gain
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#define GLOBAL_GAIN 0x50 // Global gain control (hardware: 0-63, 6-bit)
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// API uses 0-30 range, mapped to hardware values
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// Manual White Balance Gain (when AWB disabled)
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// Per Linux kernel driver: registers 0x05a-0x05c control AWB RGB gains
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#define AWB_R_GAIN 0x5a // Red channel gain for manual WB
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#define AWB_G_GAIN 0x5b // Green channel gain for manual WB
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#define AWB_B_GAIN 0x5c // Blue channel gain for manual WB
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// Edge Enhancement (INTPEE - Interpolation and Edge-Enhancement)
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// Per Linux kernel driver: registers 0x77-0x79 control edge enhancement
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#define EDGE12_EFFECT 0x77 // Edge enhancement effect control
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#define EDGE_POS_RATIO 0x78 // Edge position ratio
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#define EDGE1_MINMAX 0x79 // Edge1 min/max control
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// Saturation Control (Page 0)
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// According to datasheet, saturation is controlled via 0xb1 and 0xb2
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#define SATURATION_Cb 0xb1 // Cb saturation gain (default: 0x40)
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#define SATURATION_Cr 0xb2 // Cr saturation gain (default: 0x40)
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// Contrast
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#define CONTRAST 0xb3 // Contrast control (default: 0x40)
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// AEC Registers - Automatic Exposure Control (Page 0)
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// Per Linux kernel driver: AEC control registers are at 0xd0-0xd3
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#define AEC_MODE1 0xd0 // AEC mode control register 1
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#define AEC_MODE2 0xd1 // AEC mode control register 2
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#define AEC_MODE3 0xd2 // AEC mode control register 3
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#define AEC_TARGET_Y 0xd3 // AEC target Y value / Expected luminance (default: 0x48)
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// This controls both brightness and AE level
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// Subsample Window (Page 0 for coordinate reference)
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#define SUB_COL_N 0xf7 // Subsample column start (units of 4 pixels)
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#define SUB_ROW_N 0xf8 // Subsample row start (units of 4 pixels)
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#define SUB_COL_N1 0xf9 // Subsample column end (units of 4 pixels)
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#define SUB_ROW_N1 0xfa // Subsample row end (units of 4 pixels)
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// Page 1 Registers (access after setting 0xfe = 0x01)
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// Subsample Control (Page 1)
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#define SUBSAMPLE_EN 0x53 // Bit[7]: Subsample enable
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#define SUBSAMPLE_MODE 0x54 // Subsample mode control
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#define SUBSAMPLE_EN2 0x55 // Bit[0]: Subsample enable 2
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#define SUBSAMPLE_Y0 0x56 // Y subsample config 0
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#define SUBSAMPLE_Y1 0x57 // Y subsample config 1
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#define SUBSAMPLE_UV0 0x58 // UV subsample config 0
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#define SUBSAMPLE_UV1 0x59 // UV subsample config 1
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/**
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* @brief Register bit masks
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*/
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// AAAA_EN (0x22) bit masks - Auto Algorithm Enable
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#define AEC_ENABLE 0x01 // Bit 0: AEC enable
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#define AWB_ENABLE 0x02 // Bit 1: AWB enable
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#define AGC_ENABLE 0x04 // Bit 2: AGC enable
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// CISCTL_MODE1 (0x14) bit masks
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#define HMIRROR_MASK 0x01 // Bit 0: Horizontal mirror
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#define VFLIP_MASK 0x02 // Bit 1: Vertical flip
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// SPECIAL_EFFECT (0x23) bit masks
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#define EFFECT_NORMAL 0x00 // Normal mode
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#define EFFECT_NEGATIVE 0x01 // Negative/inverse
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#define EFFECT_GRAYSCALE 0x02 // B&W or color tint mode
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// OUT_CTRL (0x2e) bit masks
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#define COLORBAR_ENABLE 0x01 // Bit 0: Color bar test pattern
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#endif // __GC0308_REG_REGS_H__
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