遥控器控制电机转动,队列用法还没实现
This commit is contained in:
26
.mxproject
26
.mxproject
File diff suppressed because one or more lines are too long
@@ -49,6 +49,8 @@ target_sources(${CMAKE_PROJECT_NAME} PRIVATE
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Core/Src/bsp_can.c
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Core/Src/chassis_control.c
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Core/Src/pid.c
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Core/Src/bsp_rc.c
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Core/Src/remote_control.c
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)
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# Add include paths
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8
Core/Inc/bsp_rc.h
Normal file
8
Core/Inc/bsp_rc.h
Normal file
@@ -0,0 +1,8 @@
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#ifndef BSP_RC_H
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#define BSP_RC_H
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#include "main.h"
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extern void RC_init(uint8_t *rx1_buf, uint8_t *rx2_buf, uint16_t dma_buf_num);
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extern void RC_unable(void);
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extern void RC_restart(uint16_t dma_buf_num);
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#endif
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52
Core/Inc/dma.h
Normal file
52
Core/Inc/dma.h
Normal file
@@ -0,0 +1,52 @@
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/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file dma.h
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* @brief This file contains all the function prototypes for
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* the dma.c file
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2026 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __DMA_H__
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#define __DMA_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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/* DMA memory to memory transfer handles -------------------------------------*/
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/* USER CODE BEGIN Includes */
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/* USER CODE END Includes */
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/* USER CODE BEGIN Private defines */
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/* USER CODE END Private defines */
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void MX_DMA_Init(void);
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/* USER CODE BEGIN Prototypes */
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/* USER CODE END Prototypes */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __DMA_H__ */
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105
Core/Inc/remote_control.h
Normal file
105
Core/Inc/remote_control.h
Normal file
@@ -0,0 +1,105 @@
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/**
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****************************(C) COPYRIGHT 2016 DJI****************************
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* @file remote_control.c/h
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* @brief ң<><D2A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ң<EFBFBD><D2A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>SBUS<55><53>Э<EFBFBD>鴫<EFBFBD>䣬<EFBFBD><E4A3AC><EFBFBD><EFBFBD>DMA<4D><41><EFBFBD>䷽ʽ<E4B7BD><CABD>ԼCPU
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* <20><>Դ<EFBFBD><D4B4><EFBFBD><EFBFBD><EFBFBD>ô<EFBFBD><C3B4>ڿ<EFBFBD><DABF><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͬʱ<CDAC>ṩһЩ<D2BB><D0A9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA<4D><41><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* <20>ķ<EFBFBD>ʽ<EFBFBD><CABD>֤<EFBFBD>Ȳ<EFBFBD>ε<EFBFBD><CEB5>ȶ<EFBFBD><C8B6>ԡ<EFBFBD>
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* @note
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* @history
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* Version Date Author Modification
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* V1.0.0 Dec-26-2018 RM 1. <20><><EFBFBD>
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*
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@verbatim
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==============================================================================
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==============================================================================
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@endverbatim
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****************************(C) COPYRIGHT 2016 DJI****************************
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*/
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#ifndef REMOTE_CONTROL_H
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#define REMOTE_CONTROL_H
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#include "main.h"
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#include "bsp_rc.h"
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#define SBUS_RX_BUF_NUM 36u
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#define RC_FRAME_LENGTH 18u
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#define RC_CH_VALUE_MIN ((uint16_t)364)
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#define RC_CH_VALUE_OFFSET ((uint16_t)1024)
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#define RC_CH_VALUE_MAX ((uint16_t)1684)
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/* ----------------------- RC Switch Definition----------------------------- */
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#define RC_SW_UP ((uint16_t)1)
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#define RC_SW_MID ((uint16_t)3)
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#define RC_SW_DOWN ((uint16_t)2)
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#define switch_is_down(s) (s == RC_SW_DOWN)
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#define switch_is_mid(s) (s == RC_SW_MID)
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#define switch_is_up(s) (s == RC_SW_UP)
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/* ----------------------- PC Key Definition-------------------------------- */
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#define KEY_PRESSED_OFFSET_W ((uint16_t)1 << 0)
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#define KEY_PRESSED_OFFSET_S ((uint16_t)1 << 1)
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#define KEY_PRESSED_OFFSET_A ((uint16_t)1 << 2)
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#define KEY_PRESSED_OFFSET_D ((uint16_t)1 << 3)
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#define KEY_PRESSED_OFFSET_SHIFT ((uint16_t)1 << 4)
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#define KEY_PRESSED_OFFSET_CTRL ((uint16_t)1 << 5)
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#define KEY_PRESSED_OFFSET_Q ((uint16_t)1 << 6)
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#define KEY_PRESSED_OFFSET_E ((uint16_t)1 << 7)
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#define KEY_PRESSED_OFFSET_R ((uint16_t)1 << 8)
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#define KEY_PRESSED_OFFSET_F ((uint16_t)1 << 9)
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#define KEY_PRESSED_OFFSET_G ((uint16_t)1 << 10)
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#define KEY_PRESSED_OFFSET_Z ((uint16_t)1 << 11)
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#define KEY_PRESSED_OFFSET_X ((uint16_t)1 << 12)
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#define KEY_PRESSED_OFFSET_C ((uint16_t)1 << 13)
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#define KEY_PRESSED_OFFSET_V ((uint16_t)1 << 14)
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#define KEY_PRESSED_OFFSET_B ((uint16_t)1 << 15)
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/* ----------------------- Data Struct ------------------------------------- */
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typedef __packed struct
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{
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__packed struct
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{
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int16_t ch[5];
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char s[2];
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} rc;
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__packed struct
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{
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int16_t x;
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int16_t y;
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int16_t z;
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uint8_t press_l;
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uint8_t press_r;
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} mouse;
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__packed struct
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{
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uint16_t v;
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} key;
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} RC_ctrl_t;
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/* ----------------------- Internal Data ----------------------------------- */
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/**
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* @brief remote control init
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* @param[in] none
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* @retval none
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*/
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/**
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* @brief ң<><D2A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>
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* @param[in] none
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* @retval none
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*/
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extern void remote_control_init(void);
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/**
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* @brief get remote control data point
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* @param[in] none
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* @retval remote control data point
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*/
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/**
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* @brief <20><>ȡң<C8A1><D2A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
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* @param[in] none
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* @retval ң<><D2A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
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*/
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extern const RC_ctrl_t *get_remote_control_point(void);
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extern void RC_USART3_IRQHandler(void);
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#endif
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@@ -64,7 +64,7 @@
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/* #define HAL_MMC_MODULE_ENABLED */
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/* #define HAL_SPI_MODULE_ENABLED */
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#define HAL_TIM_MODULE_ENABLED
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/* #define HAL_UART_MODULE_ENABLED */
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#define HAL_UART_MODULE_ENABLED
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/* #define HAL_USART_MODULE_ENABLED */
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/* #define HAL_IRDA_MODULE_ENABLED */
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/* #define HAL_SMARTCARD_MODULE_ENABLED */
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@@ -52,7 +52,9 @@ void MemManage_Handler(void);
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void BusFault_Handler(void);
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void UsageFault_Handler(void);
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void DebugMon_Handler(void);
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void DMA1_Stream1_IRQHandler(void);
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void CAN1_RX0_IRQHandler(void);
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void USART3_IRQHandler(void);
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void TIM6_DAC_IRQHandler(void);
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/* USER CODE BEGIN EFP */
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52
Core/Inc/usart.h
Normal file
52
Core/Inc/usart.h
Normal file
@@ -0,0 +1,52 @@
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/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file usart.h
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* @brief This file contains all the function prototypes for
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* the usart.c file
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2026 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __USART_H__
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#define __USART_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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/* USER CODE BEGIN Includes */
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/* USER CODE END Includes */
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extern UART_HandleTypeDef huart3;
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/* USER CODE BEGIN Private defines */
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/* USER CODE END Private defines */
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void MX_USART3_UART_Init(void);
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/* USER CODE BEGIN Prototypes */
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/* USER CODE END Prototypes */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __USART_H__ */
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@@ -22,7 +22,7 @@
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extern CAN_HandleTypeDef hcan1;
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//motor data read
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//motor data read读取电机数据,更新电机状态结构体
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#define get_motor_measure(ptr, data) \
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{ \
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(ptr)->last_ecd = (ptr)->ecd; \
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49
Core/Src/bsp_rc.c
Normal file
49
Core/Src/bsp_rc.c
Normal file
@@ -0,0 +1,49 @@
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#include "bsp_rc.h"
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#include "main.h"
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extern UART_HandleTypeDef huart3;
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extern DMA_HandleTypeDef hdma_usart3_rx;
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void RC_init(uint8_t *rx1_buf, uint8_t *rx2_buf, uint16_t dma_buf_num)
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{
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//enable the DMA transfer for the receiver request
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//ʹ<><CAB9>DMA<4D><41><EFBFBD>ڽ<EFBFBD><DABD><EFBFBD>
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SET_BIT(huart3.Instance->CR3, USART_CR3_DMAR);
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//enalbe idle interrupt
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//ʹ<>ܿ<EFBFBD><DCBF><EFBFBD><EFBFBD>ж<EFBFBD>
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__HAL_UART_ENABLE_IT(&huart3, UART_IT_IDLE);
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//disable DMA
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//ʧЧDMA
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__HAL_DMA_DISABLE(&hdma_usart3_rx);
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while(hdma_usart3_rx.Instance->CR & DMA_SxCR_EN)
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{
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__HAL_DMA_DISABLE(&hdma_usart3_rx);
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}
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hdma_usart3_rx.Instance->PAR = (uint32_t) & (USART3->DR);
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//memory buffer 1
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//<2F>ڴ滺<DAB4><E6BBBA><EFBFBD><EFBFBD>1
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hdma_usart3_rx.Instance->M0AR = (uint32_t)(rx1_buf);
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//memory buffer 2
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//<2F>ڴ滺<DAB4><E6BBBA><EFBFBD><EFBFBD>2
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hdma_usart3_rx.Instance->M1AR = (uint32_t)(rx2_buf);
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//data length
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//<2F><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
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hdma_usart3_rx.Instance->NDTR = dma_buf_num;
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//enable double memory buffer
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//ʹ<><CAB9>˫<EFBFBD><CBAB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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SET_BIT(hdma_usart3_rx.Instance->CR, DMA_SxCR_DBM);
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//enable DMA
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//ʹ<><CAB9>DMA
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__HAL_DMA_ENABLE(&hdma_usart3_rx);
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}
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@@ -17,10 +17,10 @@ static int16_t target_speed_m4;
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*/
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void chassis_control_init(void)
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{
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pid_init(&pid_motor1, 15.0f, 0.1f, 2.0f, 16384.0f, 1000.0f);//底盘电机1
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pid_init(&pid_motor2, 15.0f, 0.1f, 2.0f, 16384.0f, 1000.0f);//底盘电机2
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pid_init(&pid_motor3, 15.0f, 0.1f, 2.0f, 16384.0f, 1000.0f);//底盘电机3
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pid_init(&pid_motor4, 15.0f, 0.1f, 2.0f, 16384.0f, 1000.0f);//底盘电机4
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pid_init(&pid_motor1, 15.0f, 0.1f, 2.0f, 4000.0f, 1000.0f);//底盘电机1
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pid_init(&pid_motor2, 15.0f, 0.1f, 2.0f, 4000.0f, 1000.0f);//底盘电机2
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pid_init(&pid_motor3, 15.0f, 0.1f, 2.0f, 4000.0f, 1000.0f);//底盘电机3
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pid_init(&pid_motor4, 15.0f, 0.1f, 2.0f, 4000.0f, 1000.0f);//底盘电机4
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}
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/**
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55
Core/Src/dma.c
Normal file
55
Core/Src/dma.c
Normal file
@@ -0,0 +1,55 @@
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/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file dma.c
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* @brief This file provides code for the configuration
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* of all the requested memory to memory DMA transfers.
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******************************************************************************
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* @attention
|
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*
|
||||
* Copyright (c) 2026 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
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||||
/* USER CODE END Header */
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||||
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/* Includes ------------------------------------------------------------------*/
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#include "dma.h"
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/* USER CODE BEGIN 0 */
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||||
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/* USER CODE END 0 */
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||||
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/*----------------------------------------------------------------------------*/
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/* Configure DMA */
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/*----------------------------------------------------------------------------*/
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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||||
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/**
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* Enable DMA controller clock
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*/
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void MX_DMA_Init(void)
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{
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||||
/* DMA controller clock enable */
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__HAL_RCC_DMA1_CLK_ENABLE();
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||||
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||||
/* DMA interrupt init */
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||||
/* DMA1_Stream1_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA1_Stream1_IRQn, 5, 0);
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||||
HAL_NVIC_EnableIRQ(DMA1_Stream1_IRQn);
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||||
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||||
}
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||||
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||||
/* USER CODE BEGIN 2 */
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||||
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||||
/* USER CODE END 2 */
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||||
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@@ -28,9 +28,12 @@
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#include "bsp_can.h"
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#include "CAN_receive.h"
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#include "chassis_control.h"
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||||
#include "bsp_rc.h"
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#include "remote_control.h"
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/* USER CODE END Includes */
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||||
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/* Private typedef -----------------------------------------------------------*/
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typedef StaticQueue_t osStaticMessageQDef_t;
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/* USER CODE BEGIN PTD */
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||||
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||||
/* USER CODE END PTD */
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@@ -63,6 +66,24 @@ const osThreadAttr_t Chassis_Control_attributes = {
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.stack_size = 128 * 4,
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.priority = (osPriority_t) osPriorityNormal,
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};
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||||
/* Definitions for Command_Task */
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osThreadId_t Command_TaskHandle;
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const osThreadAttr_t Command_Task_attributes = {
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||||
.name = "Command_Task",
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.stack_size = 128 * 4,
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.priority = (osPriority_t) osPriorityNormal,
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};
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||||
/* Definitions for chassis_speed_queue */
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||||
osMessageQueueId_t chassis_speed_queueHandle;
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uint8_t chassis_speed_queueBuffer[ 5 * sizeof( uint16_t ) ];
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osStaticMessageQDef_t chassis_speed_queueControlBlock;
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const osMessageQueueAttr_t chassis_speed_queue_attributes = {
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.name = "chassis_speed_queue",
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.cb_mem = &chassis_speed_queueControlBlock,
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.cb_size = sizeof(chassis_speed_queueControlBlock),
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.mq_mem = &chassis_speed_queueBuffer,
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||||
.mq_size = sizeof(chassis_speed_queueBuffer)
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||||
};
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||||
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||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* USER CODE BEGIN FunctionPrototypes */
|
||||
@@ -71,6 +92,7 @@ const osThreadAttr_t Chassis_Control_attributes = {
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||||
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||||
void StartCAN_Receive_Task(void *argument);
|
||||
void StartChassis_Control_Task(void *argument);
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||||
void StartCommand_Task(void *argument);
|
||||
|
||||
void MX_FREERTOS_Init(void); /* (MISRA C 2004 rule 8.1) */
|
||||
|
||||
@@ -96,6 +118,10 @@ void MX_FREERTOS_Init(void) {
|
||||
/* start timers, add new ones, ... */
|
||||
/* USER CODE END RTOS_TIMERS */
|
||||
|
||||
/* Create the queue(s) */
|
||||
/* creation of chassis_speed_queue */
|
||||
chassis_speed_queueHandle = osMessageQueueNew (5, sizeof(uint16_t), &chassis_speed_queue_attributes);
|
||||
|
||||
/* USER CODE BEGIN RTOS_QUEUES */
|
||||
/* add queues, ... */
|
||||
/* USER CODE END RTOS_QUEUES */
|
||||
@@ -107,6 +133,9 @@ void MX_FREERTOS_Init(void) {
|
||||
/* creation of Chassis_Control */
|
||||
Chassis_ControlHandle = osThreadNew(StartChassis_Control_Task, NULL, &Chassis_Control_attributes);
|
||||
|
||||
/* creation of Command_Task */
|
||||
Command_TaskHandle = osThreadNew(StartCommand_Task, NULL, &Command_Task_attributes);
|
||||
|
||||
/* USER CODE BEGIN RTOS_THREADS */
|
||||
/* add threads, ... */
|
||||
/* USER CODE END RTOS_THREADS */
|
||||
@@ -147,18 +176,49 @@ void StartChassis_Control_Task(void *argument)
|
||||
{
|
||||
/* USER CODE BEGIN StartChassis_Control_Task */
|
||||
chassis_control_init();
|
||||
chassis_set_speed(100, 0, 0, 0);
|
||||
int16_t speed = 0;
|
||||
/* Infinite loop */
|
||||
for(;;)
|
||||
{
|
||||
chassis_control_task();//电机控制
|
||||
if (osMessageQueueGet(chassis_speed_queueHandle, &speed, NULL, 0) == osOK)
|
||||
{
|
||||
chassis_set_speed(speed, 0, 0, 0);
|
||||
}
|
||||
chassis_control_task();
|
||||
osDelay(1);
|
||||
}
|
||||
/* USER CODE END StartChassis_Control_Task */
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN Header_StartCommand_Task */
|
||||
/**
|
||||
* @brief Function implementing the Command_Task thread.
|
||||
* @param argument: Not used
|
||||
* @retval None
|
||||
*/
|
||||
/* USER CODE END Header_StartCommand_Task */
|
||||
void StartCommand_Task(void *argument)
|
||||
{
|
||||
/* USER CODE BEGIN StartCommand_Task */
|
||||
remote_control_init();
|
||||
const RC_ctrl_t *rc;
|
||||
int16_t speed;
|
||||
/* Infinite loop */
|
||||
for(;;)
|
||||
{
|
||||
rc = get_remote_control_point();//rc=获取遥控器数据
|
||||
speed = (int16_t)((float)rc->rc.ch[3] * 5000.0f / 660.0f);//根据通道三的值,映射到-5000到5000之间
|
||||
if (speed > 5000)
|
||||
speed = 5000;
|
||||
if (speed < -5000)
|
||||
speed = -5000;
|
||||
osMessageQueuePut(chassis_speed_queueHandle, &speed, 0, 0);
|
||||
osDelay(10);
|
||||
}
|
||||
/* USER CODE END StartCommand_Task */
|
||||
}
|
||||
|
||||
/* Private application code --------------------------------------------------*/
|
||||
/* USER CODE BEGIN Application */
|
||||
|
||||
/* USER CODE END Application */
|
||||
|
||||
/* USER CODE END Application */
|
||||
@@ -45,6 +45,7 @@ void MX_GPIO_Init(void)
|
||||
/* GPIO Ports Clock Enable */
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOH_CLK_ENABLE();
|
||||
|
||||
}
|
||||
|
||||
@@ -20,6 +20,8 @@
|
||||
#include "main.h"
|
||||
#include "cmsis_os.h"
|
||||
#include "can.h"
|
||||
#include "dma.h"
|
||||
#include "usart.h"
|
||||
#include "gpio.h"
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
@@ -91,7 +93,9 @@ int main(void)
|
||||
|
||||
/* Initialize all configured peripherals */
|
||||
MX_GPIO_Init();
|
||||
MX_DMA_Init();
|
||||
MX_CAN1_Init();
|
||||
MX_USART3_UART_Init();
|
||||
/* USER CODE BEGIN 2 */
|
||||
can_filter_init();
|
||||
/* USER CODE END 2 */
|
||||
|
||||
194
Core/Src/remote_control.c
Normal file
194
Core/Src/remote_control.c
Normal file
@@ -0,0 +1,194 @@
|
||||
/**
|
||||
****************************(C) COPYRIGHT 2019 DJI****************************
|
||||
* @file remote_control.c/h
|
||||
* @brief ?????????????????????????SBUS??<3F><>?<3F><>??????DMA????????CPU
|
||||
* ????????????????<3F><>????????????????????<3F><>????????DMA??????
|
||||
* ??????????<3F><>???????
|
||||
* @note ????????????????<3F><>???????????freeRTOS????
|
||||
* @history
|
||||
* Version Date Author Modification
|
||||
* V1.0.0 Dec-01-2019 RM 1. ???
|
||||
*
|
||||
@verbatim
|
||||
==============================================================================
|
||||
|
||||
==============================================================================
|
||||
@endverbatim
|
||||
****************************(C) COPYRIGHT 2019 DJI****************************
|
||||
*/
|
||||
|
||||
#include "remote_control.h"
|
||||
|
||||
#include "main.h"
|
||||
|
||||
|
||||
extern UART_HandleTypeDef huart3;
|
||||
extern DMA_HandleTypeDef hdma_usart3_rx;
|
||||
|
||||
/**
|
||||
* @brief remote control protocol resolution
|
||||
* @param[in] sbus_buf: raw data point
|
||||
* @param[out] rc_ctrl: remote control data struct point
|
||||
* @retval none
|
||||
*/
|
||||
/**
|
||||
* @brief ?????<3F><>?????
|
||||
* @param[in] sbus_buf: ??????????
|
||||
* @param[out] rc_ctrl: ??????????
|
||||
* @retval none
|
||||
*/
|
||||
static void sbus_to_rc(volatile const uint8_t *sbus_buf, RC_ctrl_t *rc_ctrl);
|
||||
|
||||
//remote control data
|
||||
//????????????
|
||||
RC_ctrl_t rc_ctrl;
|
||||
|
||||
//receive data, 18 bytes one frame, but set 36 bytes
|
||||
//????????????18??????????36????????????DMA???????
|
||||
static uint8_t sbus_rx_buf[2][SBUS_RX_BUF_NUM];
|
||||
|
||||
/**
|
||||
* @brief remote control init
|
||||
* @param[in] none
|
||||
* @retval none
|
||||
*/
|
||||
/**
|
||||
* @brief ??????????
|
||||
* @param[in] none
|
||||
* @retval none
|
||||
*/
|
||||
void remote_control_init(void)
|
||||
{
|
||||
RC_init(sbus_rx_buf[0], sbus_rx_buf[1], SBUS_RX_BUF_NUM);
|
||||
}
|
||||
/**
|
||||
* @brief get remote control data point
|
||||
* @param[in] none
|
||||
* @retval remote control data point
|
||||
*/
|
||||
/**
|
||||
* @brief ???????????????
|
||||
* @param[in] none
|
||||
* @retval ????????????
|
||||
*/
|
||||
const RC_ctrl_t *get_remote_control_point(void)
|
||||
{
|
||||
return &rc_ctrl;
|
||||
}
|
||||
|
||||
|
||||
//?????<3F><>?
|
||||
void RC_USART3_IRQHandler(void)
|
||||
{
|
||||
if(huart3.Instance->SR & UART_FLAG_RXNE)//?????????
|
||||
{
|
||||
__HAL_UART_CLEAR_PEFLAG(&huart3);
|
||||
}
|
||||
else if(USART3->SR & UART_FLAG_IDLE)
|
||||
{
|
||||
static uint16_t this_time_rx_len = 0;
|
||||
|
||||
__HAL_UART_CLEAR_PEFLAG(&huart3);
|
||||
|
||||
if ((hdma_usart3_rx.Instance->CR & DMA_SxCR_CT) == RESET)
|
||||
{
|
||||
/* Current memory buffer used is Memory 0 */
|
||||
|
||||
//disable DMA
|
||||
//?<3F><>DMA
|
||||
__HAL_DMA_DISABLE(&hdma_usart3_rx);
|
||||
|
||||
//get receive data length, length = set_data_length - remain_length
|
||||
//??????????????,???? = ?څ???? - ?????
|
||||
this_time_rx_len = SBUS_RX_BUF_NUM - hdma_usart3_rx.Instance->NDTR;
|
||||
|
||||
//reset set_data_lenght
|
||||
//?????څ???????
|
||||
hdma_usart3_rx.Instance->NDTR = SBUS_RX_BUF_NUM;
|
||||
|
||||
//set memory buffer 1
|
||||
//?څ??????1
|
||||
hdma_usart3_rx.Instance->CR |= DMA_SxCR_CT;
|
||||
|
||||
//enable DMA
|
||||
//???DMA
|
||||
__HAL_DMA_ENABLE(&hdma_usart3_rx);
|
||||
|
||||
if(this_time_rx_len == RC_FRAME_LENGTH)
|
||||
{
|
||||
sbus_to_rc(sbus_rx_buf[0], &rc_ctrl);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Current memory buffer used is Memory 1 */
|
||||
//disable DMA
|
||||
//?<3F><>DMA
|
||||
__HAL_DMA_DISABLE(&hdma_usart3_rx);
|
||||
|
||||
//get receive data length, length = set_data_length - remain_length
|
||||
//??????????????,???? = ?څ???? - ?????
|
||||
this_time_rx_len = SBUS_RX_BUF_NUM - hdma_usart3_rx.Instance->NDTR;
|
||||
|
||||
//reset set_data_lenght
|
||||
//?????څ???????
|
||||
hdma_usart3_rx.Instance->NDTR = SBUS_RX_BUF_NUM;
|
||||
|
||||
//set memory buffer 0
|
||||
//?څ??????0
|
||||
DMA1_Stream1->CR &= ~(DMA_SxCR_CT);
|
||||
|
||||
//enable DMA
|
||||
//???DMA
|
||||
__HAL_DMA_ENABLE(&hdma_usart3_rx);
|
||||
|
||||
if(this_time_rx_len == RC_FRAME_LENGTH)
|
||||
{
|
||||
//?????????????
|
||||
sbus_to_rc(sbus_rx_buf[1], &rc_ctrl);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief remote control protocol resolution
|
||||
* @param[in] sbus_buf: raw data point
|
||||
* @param[out] rc_ctrl: remote control data struct point
|
||||
* @retval none
|
||||
*/
|
||||
/**
|
||||
* @brief ?????<3F><>?????
|
||||
* @param[in] sbus_buf: ??????????
|
||||
* @param[out] rc_ctrl: ??????????
|
||||
* @retval none
|
||||
*/
|
||||
static void sbus_to_rc(volatile const uint8_t *sbus_buf, RC_ctrl_t *rc_ctrl)
|
||||
{
|
||||
if (sbus_buf == NULL || rc_ctrl == NULL)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
rc_ctrl->rc.ch[0] = (sbus_buf[0] | (sbus_buf[1] << 8)) & 0x07ff; //!< Channel 0 ???????
|
||||
rc_ctrl->rc.ch[1] = ((sbus_buf[1] >> 3) | (sbus_buf[2] << 5)) & 0x07ff; //!< Channel 1 ???????
|
||||
rc_ctrl->rc.ch[2] = ((sbus_buf[2] >> 6) | (sbus_buf[3] << 2) | //!< Channel 2 ???????
|
||||
(sbus_buf[4] << 10)) &0x07ff;
|
||||
rc_ctrl->rc.ch[3] = ((sbus_buf[4] >> 1) | (sbus_buf[5] << 7)) & 0x07ff; //!< Channel 3 ???????
|
||||
rc_ctrl->rc.s[0] = ((sbus_buf[5] >> 4) & 0x0003); //!< Switch left
|
||||
rc_ctrl->rc.s[1] = ((sbus_buf[5] >> 4) & 0x000C) >> 2; //!< Switch right
|
||||
rc_ctrl->mouse.x = sbus_buf[6] | (sbus_buf[7] << 8); //!< Mouse X axis
|
||||
rc_ctrl->mouse.y = sbus_buf[8] | (sbus_buf[9] << 8); //!< Mouse Y axis
|
||||
rc_ctrl->mouse.z = sbus_buf[10] | (sbus_buf[11] << 8); //!< Mouse Z axis
|
||||
rc_ctrl->mouse.press_l = sbus_buf[12]; //!< Mouse Left Is Press ?
|
||||
rc_ctrl->mouse.press_r = sbus_buf[13]; //!< Mouse Right Is Press ?
|
||||
rc_ctrl->key.v = sbus_buf[14] | (sbus_buf[15] << 8); //!< KeyBoard value
|
||||
rc_ctrl->rc.ch[4] = sbus_buf[16] | (sbus_buf[17] << 8); //NULL
|
||||
|
||||
rc_ctrl->rc.ch[0] -= RC_CH_VALUE_OFFSET;
|
||||
rc_ctrl->rc.ch[1] -= RC_CH_VALUE_OFFSET;
|
||||
rc_ctrl->rc.ch[2] -= RC_CH_VALUE_OFFSET;
|
||||
rc_ctrl->rc.ch[3] -= RC_CH_VALUE_OFFSET;
|
||||
rc_ctrl->rc.ch[4] -= RC_CH_VALUE_OFFSET;
|
||||
}
|
||||
@@ -22,6 +22,7 @@
|
||||
#include "stm32f4xx_it.h"
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
#include "remote_control.h"
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
@@ -56,6 +57,8 @@
|
||||
|
||||
/* External variables --------------------------------------------------------*/
|
||||
extern CAN_HandleTypeDef hcan1;
|
||||
extern DMA_HandleTypeDef hdma_usart3_rx;
|
||||
extern UART_HandleTypeDef huart3;
|
||||
extern TIM_HandleTypeDef htim6;
|
||||
|
||||
/* USER CODE BEGIN EV */
|
||||
@@ -160,6 +163,20 @@ void DebugMon_Handler(void)
|
||||
/* please refer to the startup file (startup_stm32f4xx.s). */
|
||||
/******************************************************************************/
|
||||
|
||||
/**
|
||||
* @brief This function handles DMA1 stream1 global interrupt.
|
||||
*/
|
||||
void DMA1_Stream1_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN DMA1_Stream1_IRQn 0 */
|
||||
|
||||
/* USER CODE END DMA1_Stream1_IRQn 0 */
|
||||
HAL_DMA_IRQHandler(&hdma_usart3_rx);
|
||||
/* USER CODE BEGIN DMA1_Stream1_IRQn 1 */
|
||||
|
||||
/* USER CODE END DMA1_Stream1_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles CAN1 RX0 interrupts.
|
||||
*/
|
||||
@@ -174,6 +191,21 @@ void CAN1_RX0_IRQHandler(void)
|
||||
/* USER CODE END CAN1_RX0_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles USART3 global interrupt.
|
||||
*/
|
||||
void USART3_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN USART3_IRQn 0 */
|
||||
RC_USART3_IRQHandler();
|
||||
return;
|
||||
/* USER CODE END USART3_IRQn 0 */
|
||||
HAL_UART_IRQHandler(&huart3);
|
||||
/* USER CODE BEGIN USART3_IRQn 1 */
|
||||
|
||||
/* USER CODE END USART3_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles TIM6 global interrupt, DAC1 and DAC2 underrun error interrupts.
|
||||
*/
|
||||
|
||||
142
Core/Src/usart.c
Normal file
142
Core/Src/usart.c
Normal file
@@ -0,0 +1,142 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file usart.c
|
||||
* @brief This file provides code for the configuration
|
||||
* of the USART instances.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "usart.h"
|
||||
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
UART_HandleTypeDef huart3;
|
||||
DMA_HandleTypeDef hdma_usart3_rx;
|
||||
|
||||
/* USART3 init function */
|
||||
|
||||
void MX_USART3_UART_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN USART3_Init 0 */
|
||||
|
||||
/* USER CODE END USART3_Init 0 */
|
||||
|
||||
/* USER CODE BEGIN USART3_Init 1 */
|
||||
|
||||
/* USER CODE END USART3_Init 1 */
|
||||
huart3.Instance = USART3;
|
||||
huart3.Init.BaudRate = 100000;
|
||||
huart3.Init.WordLength = UART_WORDLENGTH_8B;
|
||||
huart3.Init.StopBits = UART_STOPBITS_1;
|
||||
huart3.Init.Parity = UART_PARITY_EVEN;
|
||||
huart3.Init.Mode = UART_MODE_TX_RX;
|
||||
huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE;
|
||||
huart3.Init.OverSampling = UART_OVERSAMPLING_16;
|
||||
if (HAL_UART_Init(&huart3) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN USART3_Init 2 */
|
||||
|
||||
/* USER CODE END USART3_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
|
||||
{
|
||||
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(uartHandle->Instance==USART3)
|
||||
{
|
||||
/* USER CODE BEGIN USART3_MspInit 0 */
|
||||
|
||||
/* USER CODE END USART3_MspInit 0 */
|
||||
/* USART3 clock enable */
|
||||
__HAL_RCC_USART3_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||
/**USART3 GPIO Configuration
|
||||
PC11 ------> USART3_RX
|
||||
PC10 ------> USART3_TX
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_10;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
|
||||
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||
|
||||
/* USART3 DMA Init */
|
||||
/* USART3_RX Init */
|
||||
hdma_usart3_rx.Instance = DMA1_Stream1;
|
||||
hdma_usart3_rx.Init.Channel = DMA_CHANNEL_4;
|
||||
hdma_usart3_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
||||
hdma_usart3_rx.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
hdma_usart3_rx.Init.MemInc = DMA_MINC_ENABLE;
|
||||
hdma_usart3_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
||||
hdma_usart3_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
||||
hdma_usart3_rx.Init.Mode = DMA_CIRCULAR;
|
||||
hdma_usart3_rx.Init.Priority = DMA_PRIORITY_VERY_HIGH;
|
||||
hdma_usart3_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
||||
if (HAL_DMA_Init(&hdma_usart3_rx) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
__HAL_LINKDMA(uartHandle,hdmarx,hdma_usart3_rx);
|
||||
|
||||
/* USART3 interrupt Init */
|
||||
HAL_NVIC_SetPriority(USART3_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(USART3_IRQn);
|
||||
/* USER CODE BEGIN USART3_MspInit 1 */
|
||||
|
||||
/* USER CODE END USART3_MspInit 1 */
|
||||
}
|
||||
}
|
||||
|
||||
void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
|
||||
{
|
||||
|
||||
if(uartHandle->Instance==USART3)
|
||||
{
|
||||
/* USER CODE BEGIN USART3_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END USART3_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_USART3_CLK_DISABLE();
|
||||
|
||||
/**USART3 GPIO Configuration
|
||||
PC11 ------> USART3_RX
|
||||
PC10 ------> USART3_TX
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_11|GPIO_PIN_10);
|
||||
|
||||
/* USART3 DMA DeInit */
|
||||
HAL_DMA_DeInit(uartHandle->hdmarx);
|
||||
|
||||
/* USART3 interrupt Deinit */
|
||||
HAL_NVIC_DisableIRQ(USART3_IRQn);
|
||||
/* USER CODE BEGIN USART3_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END USART3_MspDeInit 1 */
|
||||
}
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
909
Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
Normal file
909
Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
Normal file
@@ -0,0 +1,909 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f4xx_hal_uart.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of UART HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F4xx_HAL_UART_H
|
||||
#define __STM32F4xx_HAL_UART_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f4xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32F4xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup UART
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/** @defgroup UART_Exported_Types UART Exported Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief UART Init Structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
|
||||
The baud rate is computed using the following formula:
|
||||
- IntegerDivider = ((PCLKx) / (8 * (OVR8+1) * (huart->Init.BaudRate)))
|
||||
- FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8 * (OVR8+1)) + 0.5
|
||||
Where OVR8 is the "oversampling by 8 mode" configuration bit in the CR1 register. */
|
||||
|
||||
uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
|
||||
This parameter can be a value of @ref UART_Word_Length */
|
||||
|
||||
uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
|
||||
This parameter can be a value of @ref UART_Stop_Bits */
|
||||
|
||||
uint32_t Parity; /*!< Specifies the parity mode.
|
||||
This parameter can be a value of @ref UART_Parity
|
||||
@note When parity is enabled, the computed parity is inserted
|
||||
at the MSB position of the transmitted data (9th bit when
|
||||
the word length is set to 9 data bits; 8th bit when the
|
||||
word length is set to 8 data bits). */
|
||||
|
||||
uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
|
||||
This parameter can be a value of @ref UART_Mode */
|
||||
|
||||
uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled or disabled.
|
||||
This parameter can be a value of @ref UART_Hardware_Flow_Control */
|
||||
|
||||
uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8).
|
||||
This parameter can be a value of @ref UART_Over_Sampling */
|
||||
} UART_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL UART State structures definition
|
||||
* @note HAL UART State value is a combination of 2 different substates: gState and RxState.
|
||||
* - gState contains UART state information related to global Handle management
|
||||
* and also information related to Tx operations.
|
||||
* gState value coding follow below described bitmap :
|
||||
* b7-b6 Error information
|
||||
* 00 : No Error
|
||||
* 01 : (Not Used)
|
||||
* 10 : Timeout
|
||||
* 11 : Error
|
||||
* b5 Peripheral initialization status
|
||||
* 0 : Reset (Peripheral not initialized)
|
||||
* 1 : Init done (Peripheral initialized. HAL UART Init function already called)
|
||||
* b4-b3 (not used)
|
||||
* xx : Should be set to 00
|
||||
* b2 Intrinsic process state
|
||||
* 0 : Ready
|
||||
* 1 : Busy (Peripheral busy with some configuration or internal operations)
|
||||
* b1 (not used)
|
||||
* x : Should be set to 0
|
||||
* b0 Tx state
|
||||
* 0 : Ready (no Tx operation ongoing)
|
||||
* 1 : Busy (Tx operation ongoing)
|
||||
* - RxState contains information related to Rx operations.
|
||||
* RxState value coding follow below described bitmap :
|
||||
* b7-b6 (not used)
|
||||
* xx : Should be set to 00
|
||||
* b5 Peripheral initialization status
|
||||
* 0 : Reset (Peripheral not initialized)
|
||||
* 1 : Init done (Peripheral initialized)
|
||||
* b4-b2 (not used)
|
||||
* xxx : Should be set to 000
|
||||
* b1 Rx state
|
||||
* 0 : Ready (no Rx operation ongoing)
|
||||
* 1 : Busy (Rx operation ongoing)
|
||||
* b0 (not used)
|
||||
* x : Should be set to 0.
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized
|
||||
Value is allowed for gState and RxState */
|
||||
HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use
|
||||
Value is allowed for gState and RxState */
|
||||
HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing
|
||||
Value is allowed for gState only */
|
||||
HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing
|
||||
Value is allowed for gState only */
|
||||
HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing
|
||||
Value is allowed for RxState only */
|
||||
HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing
|
||||
Not to be used for neither gState nor RxState.
|
||||
Value is result of combination (Or) between gState and RxState values */
|
||||
HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state
|
||||
Value is allowed for gState only */
|
||||
HAL_UART_STATE_ERROR = 0xE0U /*!< Error
|
||||
Value is allowed for gState only */
|
||||
} HAL_UART_StateTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL UART Reception type definition
|
||||
* @note HAL UART Reception type value aims to identify which type of Reception is ongoing.
|
||||
* This parameter can be a value of @ref UART_Reception_Type_Values :
|
||||
* HAL_UART_RECEPTION_STANDARD = 0x00U,
|
||||
* HAL_UART_RECEPTION_TOIDLE = 0x01U,
|
||||
*/
|
||||
typedef uint32_t HAL_UART_RxTypeTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL UART Rx Event type definition
|
||||
* @note HAL UART Rx Event type value aims to identify which type of Event has occurred
|
||||
* leading to call of the RxEvent callback.
|
||||
* This parameter can be a value of @ref UART_RxEvent_Type_Values :
|
||||
* HAL_UART_RXEVENT_TC = 0x00U,
|
||||
* HAL_UART_RXEVENT_HT = 0x01U,
|
||||
* HAL_UART_RXEVENT_IDLE = 0x02U,
|
||||
*/
|
||||
typedef uint32_t HAL_UART_RxEventTypeTypeDef;
|
||||
|
||||
/**
|
||||
* @brief UART handle Structure definition
|
||||
*/
|
||||
typedef struct __UART_HandleTypeDef
|
||||
{
|
||||
USART_TypeDef *Instance; /*!< UART registers base address */
|
||||
|
||||
UART_InitTypeDef Init; /*!< UART communication parameters */
|
||||
|
||||
const uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */
|
||||
|
||||
uint16_t TxXferSize; /*!< UART Tx Transfer size */
|
||||
|
||||
__IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */
|
||||
|
||||
uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */
|
||||
|
||||
uint16_t RxXferSize; /*!< UART Rx Transfer size */
|
||||
|
||||
__IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */
|
||||
|
||||
__IO HAL_UART_RxTypeTypeDef ReceptionType; /*!< Type of ongoing reception */
|
||||
|
||||
__IO HAL_UART_RxEventTypeTypeDef RxEventType; /*!< Type of Rx Event */
|
||||
|
||||
DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */
|
||||
|
||||
DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */
|
||||
|
||||
HAL_LockTypeDef Lock; /*!< Locking object */
|
||||
|
||||
__IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management
|
||||
and also related to Tx operations.
|
||||
This parameter can be a value of @ref HAL_UART_StateTypeDef */
|
||||
|
||||
__IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations.
|
||||
This parameter can be a value of @ref HAL_UART_StateTypeDef */
|
||||
|
||||
__IO uint32_t ErrorCode; /*!< UART Error code */
|
||||
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */
|
||||
void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */
|
||||
void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */
|
||||
void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */
|
||||
void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */
|
||||
void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */
|
||||
void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */
|
||||
void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */
|
||||
void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */
|
||||
void (* RxEventCallback)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< UART Reception Event Callback */
|
||||
|
||||
void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */
|
||||
void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
|
||||
} UART_HandleTypeDef;
|
||||
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
/**
|
||||
* @brief HAL UART Callback ID enumeration definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */
|
||||
HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */
|
||||
HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */
|
||||
HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */
|
||||
HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */
|
||||
HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */
|
||||
HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */
|
||||
HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */
|
||||
HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */
|
||||
|
||||
HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */
|
||||
HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */
|
||||
|
||||
} HAL_UART_CallbackIDTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL UART Callback pointer definition
|
||||
*/
|
||||
typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */
|
||||
typedef void (*pUART_RxEventCallbackTypeDef)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< pointer to a UART Rx Event specific callback function */
|
||||
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup UART_Exported_Constants UART Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Error_Code UART Error Code
|
||||
* @{
|
||||
*/
|
||||
#define HAL_UART_ERROR_NONE 0x00000000U /*!< No error */
|
||||
#define HAL_UART_ERROR_PE 0x00000001U /*!< Parity error */
|
||||
#define HAL_UART_ERROR_NE 0x00000002U /*!< Noise error */
|
||||
#define HAL_UART_ERROR_FE 0x00000004U /*!< Frame error */
|
||||
#define HAL_UART_ERROR_ORE 0x00000008U /*!< Overrun error */
|
||||
#define HAL_UART_ERROR_DMA 0x00000010U /*!< DMA transfer error */
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
#define HAL_UART_ERROR_INVALID_CALLBACK 0x00000020U /*!< Invalid Callback error */
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Word_Length UART Word Length
|
||||
* @{
|
||||
*/
|
||||
#define UART_WORDLENGTH_8B 0x00000000U
|
||||
#define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Stop_Bits UART Number of Stop Bits
|
||||
* @{
|
||||
*/
|
||||
#define UART_STOPBITS_1 0x00000000U
|
||||
#define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Parity UART Parity
|
||||
* @{
|
||||
*/
|
||||
#define UART_PARITY_NONE 0x00000000U
|
||||
#define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
|
||||
#define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
|
||||
* @{
|
||||
*/
|
||||
#define UART_HWCONTROL_NONE 0x00000000U
|
||||
#define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE)
|
||||
#define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE)
|
||||
#define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Mode UART Transfer Mode
|
||||
* @{
|
||||
*/
|
||||
#define UART_MODE_RX ((uint32_t)USART_CR1_RE)
|
||||
#define UART_MODE_TX ((uint32_t)USART_CR1_TE)
|
||||
#define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE | USART_CR1_RE))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_State UART State
|
||||
* @{
|
||||
*/
|
||||
#define UART_STATE_DISABLE 0x00000000U
|
||||
#define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Over_Sampling UART Over Sampling
|
||||
* @{
|
||||
*/
|
||||
#define UART_OVERSAMPLING_16 0x00000000U
|
||||
#define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_LIN_Break_Detection_Length UART LIN Break Detection Length
|
||||
* @{
|
||||
*/
|
||||
#define UART_LINBREAKDETECTLENGTH_10B 0x00000000U
|
||||
#define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_WakeUp_functions UART Wakeup Functions
|
||||
* @{
|
||||
*/
|
||||
#define UART_WAKEUPMETHOD_IDLELINE 0x00000000U
|
||||
#define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)USART_CR1_WAKE)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Flags UART FLags
|
||||
* Elements values convention: 0xXXXX
|
||||
* - 0xXXXX : Flag mask in the SR register
|
||||
* @{
|
||||
*/
|
||||
#define UART_FLAG_CTS ((uint32_t)USART_SR_CTS)
|
||||
#define UART_FLAG_LBD ((uint32_t)USART_SR_LBD)
|
||||
#define UART_FLAG_TXE ((uint32_t)USART_SR_TXE)
|
||||
#define UART_FLAG_TC ((uint32_t)USART_SR_TC)
|
||||
#define UART_FLAG_RXNE ((uint32_t)USART_SR_RXNE)
|
||||
#define UART_FLAG_IDLE ((uint32_t)USART_SR_IDLE)
|
||||
#define UART_FLAG_ORE ((uint32_t)USART_SR_ORE)
|
||||
#define UART_FLAG_NE ((uint32_t)USART_SR_NE)
|
||||
#define UART_FLAG_FE ((uint32_t)USART_SR_FE)
|
||||
#define UART_FLAG_PE ((uint32_t)USART_SR_PE)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Interrupt_definition UART Interrupt Definitions
|
||||
* Elements values convention: 0xY000XXXX
|
||||
* - XXXX : Interrupt mask (16 bits) in the Y register
|
||||
* - Y : Interrupt source register (2bits)
|
||||
* - 0001: CR1 register
|
||||
* - 0010: CR2 register
|
||||
* - 0011: CR3 register
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define UART_IT_PE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_PEIE))
|
||||
#define UART_IT_TXE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TXEIE))
|
||||
#define UART_IT_TC ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TCIE))
|
||||
#define UART_IT_RXNE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_RXNEIE))
|
||||
#define UART_IT_IDLE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_IDLEIE))
|
||||
|
||||
#define UART_IT_LBD ((uint32_t)(UART_CR2_REG_INDEX << 28U | USART_CR2_LBDIE))
|
||||
|
||||
#define UART_IT_CTS ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_CTSIE))
|
||||
#define UART_IT_ERR ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_EIE))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Reception_Type_Values UART Reception type values
|
||||
* @{
|
||||
*/
|
||||
#define HAL_UART_RECEPTION_STANDARD (0x00000000U) /*!< Standard reception */
|
||||
#define HAL_UART_RECEPTION_TOIDLE (0x00000001U) /*!< Reception till completion or IDLE event */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_RxEvent_Type_Values UART RxEvent type values
|
||||
* @{
|
||||
*/
|
||||
#define HAL_UART_RXEVENT_TC (0x00000000U) /*!< RxEvent linked to Transfer Complete event */
|
||||
#define HAL_UART_RXEVENT_HT (0x00000001U) /*!< RxEvent linked to Half Transfer event */
|
||||
#define HAL_UART_RXEVENT_IDLE (0x00000002U)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/** @defgroup UART_Exported_Macros UART Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @brief Reset UART handle gstate & RxState
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
* @retval None
|
||||
*/
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
#define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
|
||||
(__HANDLE__)->gState = HAL_UART_STATE_RESET; \
|
||||
(__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
|
||||
(__HANDLE__)->MspInitCallback = NULL; \
|
||||
(__HANDLE__)->MspDeInitCallback = NULL; \
|
||||
} while(0U)
|
||||
#else
|
||||
#define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
|
||||
(__HANDLE__)->gState = HAL_UART_STATE_RESET; \
|
||||
(__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
|
||||
} while(0U)
|
||||
#endif /*USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
|
||||
/** @brief Flushes the UART DR register
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
*/
|
||||
#define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR)
|
||||
|
||||
/** @brief Checks whether the specified UART flag is set or not.
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
* @param __FLAG__ specifies the flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5)
|
||||
* @arg UART_FLAG_LBD: LIN Break detection flag
|
||||
* @arg UART_FLAG_TXE: Transmit data register empty flag
|
||||
* @arg UART_FLAG_TC: Transmission Complete flag
|
||||
* @arg UART_FLAG_RXNE: Receive data register not empty flag
|
||||
* @arg UART_FLAG_IDLE: Idle Line detection flag
|
||||
* @arg UART_FLAG_ORE: Overrun Error flag
|
||||
* @arg UART_FLAG_NE: Noise Error flag
|
||||
* @arg UART_FLAG_FE: Framing Error flag
|
||||
* @arg UART_FLAG_PE: Parity Error flag
|
||||
* @retval The new state of __FLAG__ (TRUE or FALSE).
|
||||
*/
|
||||
#define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
|
||||
|
||||
/** @brief Clears the specified UART pending flag.
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
* @param __FLAG__ specifies the flag to check.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5).
|
||||
* @arg UART_FLAG_LBD: LIN Break detection flag.
|
||||
* @arg UART_FLAG_TC: Transmission Complete flag.
|
||||
* @arg UART_FLAG_RXNE: Receive data register not empty flag.
|
||||
*
|
||||
* @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (Overrun
|
||||
* error) and IDLE (Idle line detected) flags are cleared by software
|
||||
* sequence: a read operation to USART_SR register followed by a read
|
||||
* operation to USART_DR register.
|
||||
* @note RXNE flag can be also cleared by a read to the USART_DR register.
|
||||
* @note TC flag can be also cleared by software sequence: a read operation to
|
||||
* USART_SR register followed by a write operation to USART_DR register.
|
||||
* @note TXE flag is cleared only by a write to the USART_DR register.
|
||||
*
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
|
||||
|
||||
/** @brief Clears the UART PE pending flag.
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) \
|
||||
do{ \
|
||||
__IO uint32_t tmpreg = 0x00U; \
|
||||
tmpreg = (__HANDLE__)->Instance->SR; \
|
||||
tmpreg = (__HANDLE__)->Instance->DR; \
|
||||
UNUSED(tmpreg); \
|
||||
} while(0U)
|
||||
|
||||
/** @brief Clears the UART FE pending flag.
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
|
||||
|
||||
/** @brief Clears the UART NE pending flag.
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
|
||||
|
||||
/** @brief Clears the UART ORE pending flag.
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
|
||||
|
||||
/** @brief Clears the UART IDLE pending flag.
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
|
||||
|
||||
/** @brief Enable the specified UART interrupt.
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
* @param __INTERRUPT__ specifies the UART interrupt source to enable.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg UART_IT_CTS: CTS change interrupt
|
||||
* @arg UART_IT_LBD: LIN Break detection interrupt
|
||||
* @arg UART_IT_TXE: Transmit Data Register empty interrupt
|
||||
* @arg UART_IT_TC: Transmission complete interrupt
|
||||
* @arg UART_IT_RXNE: Receive Data register not empty interrupt
|
||||
* @arg UART_IT_IDLE: Idle line detection interrupt
|
||||
* @arg UART_IT_PE: Parity Error interrupt
|
||||
* @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & UART_IT_MASK)): \
|
||||
(((__INTERRUPT__) >> 28U) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & UART_IT_MASK)): \
|
||||
((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & UART_IT_MASK)))
|
||||
|
||||
/** @brief Disable the specified UART interrupt.
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
* @param __INTERRUPT__ specifies the UART interrupt source to disable.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg UART_IT_CTS: CTS change interrupt
|
||||
* @arg UART_IT_LBD: LIN Break detection interrupt
|
||||
* @arg UART_IT_TXE: Transmit Data Register empty interrupt
|
||||
* @arg UART_IT_TC: Transmission complete interrupt
|
||||
* @arg UART_IT_RXNE: Receive Data register not empty interrupt
|
||||
* @arg UART_IT_IDLE: Idle line detection interrupt
|
||||
* @arg UART_IT_PE: Parity Error interrupt
|
||||
* @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & UART_IT_MASK)): \
|
||||
(((__INTERRUPT__) >> 28U) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & UART_IT_MASK)): \
|
||||
((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & UART_IT_MASK)))
|
||||
|
||||
/** @brief Checks whether the specified UART interrupt source is enabled or not.
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
* @param __IT__ specifies the UART interrupt source to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
|
||||
* @arg UART_IT_LBD: LIN Break detection interrupt
|
||||
* @arg UART_IT_TXE: Transmit Data Register empty interrupt
|
||||
* @arg UART_IT_TC: Transmission complete interrupt
|
||||
* @arg UART_IT_RXNE: Receive Data register not empty interrupt
|
||||
* @arg UART_IT_IDLE: Idle line detection interrupt
|
||||
* @arg UART_IT_ERR: Error interrupt
|
||||
* @retval The new state of __IT__ (TRUE or FALSE).
|
||||
*/
|
||||
#define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28U) == UART_CR1_REG_INDEX)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28U) == UART_CR2_REG_INDEX)? \
|
||||
(__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & UART_IT_MASK))
|
||||
|
||||
/** @brief Enable CTS flow control
|
||||
* @note This macro allows to enable CTS hardware flow control for a given UART instance,
|
||||
* without need to call HAL_UART_Init() function.
|
||||
* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
|
||||
* @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
|
||||
* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
|
||||
* - UART instance should have already been initialised (through call of HAL_UART_Init() )
|
||||
* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
|
||||
* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* The Handle Instance can be any USARTx (supporting the HW Flow control feature).
|
||||
* It is used to select the USART peripheral (USART availability and x value depending on device).
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
|
||||
do{ \
|
||||
ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
|
||||
(__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \
|
||||
} while(0U)
|
||||
|
||||
/** @brief Disable CTS flow control
|
||||
* @note This macro allows to disable CTS hardware flow control for a given UART instance,
|
||||
* without need to call HAL_UART_Init() function.
|
||||
* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
|
||||
* @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
|
||||
* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
|
||||
* - UART instance should have already been initialised (through call of HAL_UART_Init() )
|
||||
* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
|
||||
* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* The Handle Instance can be any USARTx (supporting the HW Flow control feature).
|
||||
* It is used to select the USART peripheral (USART availability and x value depending on device).
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
|
||||
do{ \
|
||||
ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
|
||||
(__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
|
||||
} while(0U)
|
||||
|
||||
/** @brief Enable RTS flow control
|
||||
* This macro allows to enable RTS hardware flow control for a given UART instance,
|
||||
* without need to call HAL_UART_Init() function.
|
||||
* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
|
||||
* @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
|
||||
* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
|
||||
* - UART instance should have already been initialised (through call of HAL_UART_Init() )
|
||||
* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
|
||||
* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* The Handle Instance can be any USARTx (supporting the HW Flow control feature).
|
||||
* It is used to select the USART peripheral (USART availability and x value depending on device).
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
|
||||
do{ \
|
||||
ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
|
||||
(__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \
|
||||
} while(0U)
|
||||
|
||||
/** @brief Disable RTS flow control
|
||||
* This macro allows to disable RTS hardware flow control for a given UART instance,
|
||||
* without need to call HAL_UART_Init() function.
|
||||
* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
|
||||
* @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
|
||||
* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
|
||||
* - UART instance should have already been initialised (through call of HAL_UART_Init() )
|
||||
* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
|
||||
* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* The Handle Instance can be any USARTx (supporting the HW Flow control feature).
|
||||
* It is used to select the USART peripheral (USART availability and x value depending on device).
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
|
||||
do{ \
|
||||
ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
|
||||
(__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
|
||||
} while(0U)
|
||||
|
||||
/** @brief Macro to enable the UART's one bit sample method
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
|
||||
|
||||
/** @brief Macro to disable the UART's one bit sample method
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3\
|
||||
&= (uint16_t)~((uint16_t)USART_CR3_ONEBIT))
|
||||
|
||||
/** @brief Enable UART
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
|
||||
|
||||
/** @brief Disable UART
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @addtogroup UART_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Initialization/de-initialization functions **********************************/
|
||||
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
|
||||
HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
|
||||
HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_MspInit(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
|
||||
|
||||
/* Callbacks Register/UnRegister functions ***********************************/
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID,
|
||||
pUART_CallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID);
|
||||
|
||||
HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart);
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup UART_Exported_Functions_Group2 IO operation functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* IO operation functions *******************************************************/
|
||||
HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
|
||||
|
||||
HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen,
|
||||
uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
|
||||
|
||||
HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(UART_HandleTypeDef *huart);
|
||||
|
||||
/* Transfer Abort functions */
|
||||
HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart);
|
||||
|
||||
void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart);
|
||||
|
||||
void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup UART_Exported_Functions_Group3
|
||||
* @{
|
||||
*/
|
||||
/* Peripheral Control functions ************************************************/
|
||||
HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup UART_Exported_Functions_Group4
|
||||
* @{
|
||||
*/
|
||||
/* Peripheral State functions **************************************************/
|
||||
HAL_UART_StateTypeDef HAL_UART_GetState(const UART_HandleTypeDef *huart);
|
||||
uint32_t HAL_UART_GetError(const UART_HandleTypeDef *huart);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/* Private types -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private constants ---------------------------------------------------------*/
|
||||
/** @defgroup UART_Private_Constants UART Private Constants
|
||||
* @{
|
||||
*/
|
||||
/** @brief UART interruptions flag mask
|
||||
*
|
||||
*/
|
||||
#define UART_IT_MASK 0x0000FFFFU
|
||||
|
||||
#define UART_CR1_REG_INDEX 1U
|
||||
#define UART_CR2_REG_INDEX 2U
|
||||
#define UART_CR3_REG_INDEX 3U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/** @defgroup UART_Private_Macros UART Private Macros
|
||||
* @{
|
||||
*/
|
||||
#define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B) || \
|
||||
((LENGTH) == UART_WORDLENGTH_9B))
|
||||
#define IS_UART_LIN_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B))
|
||||
#define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) || \
|
||||
((STOPBITS) == UART_STOPBITS_2))
|
||||
#define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) || \
|
||||
((PARITY) == UART_PARITY_EVEN) || \
|
||||
((PARITY) == UART_PARITY_ODD))
|
||||
#define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\
|
||||
(((CONTROL) == UART_HWCONTROL_NONE) || \
|
||||
((CONTROL) == UART_HWCONTROL_RTS) || \
|
||||
((CONTROL) == UART_HWCONTROL_CTS) || \
|
||||
((CONTROL) == UART_HWCONTROL_RTS_CTS))
|
||||
#define IS_UART_MODE(MODE) ((((MODE) & 0x0000FFF3U) == 0x00U) && ((MODE) != 0x00U))
|
||||
#define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) || \
|
||||
((STATE) == UART_STATE_ENABLE))
|
||||
#define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) || \
|
||||
((SAMPLING) == UART_OVERSAMPLING_8))
|
||||
#define IS_UART_LIN_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16))
|
||||
#define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \
|
||||
((LENGTH) == UART_LINBREAKDETECTLENGTH_11B))
|
||||
#define IS_UART_WAKEUPMETHOD(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHOD_IDLELINE) || \
|
||||
((WAKEUP) == UART_WAKEUPMETHOD_ADDRESSMARK))
|
||||
#define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) <= 10500000U)
|
||||
#define IS_UART_ADDRESS(ADDRESS) ((ADDRESS) <= 0x0FU)
|
||||
|
||||
#define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) ((uint32_t)((((uint64_t)(_PCLK_))*25U)/(4U*((uint64_t)(_BAUD_)))))
|
||||
#define UART_DIVMANT_SAMPLING16(_PCLK_, _BAUD_) (UART_DIV_SAMPLING16((_PCLK_), (_BAUD_))/100U)
|
||||
#define UART_DIVFRAQ_SAMPLING16(_PCLK_, _BAUD_) ((((UART_DIV_SAMPLING16((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) * 100U)) * 16U)\
|
||||
+ 50U) / 100U)
|
||||
/* UART BRR = mantissa + overflow + fraction
|
||||
= (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0FU) */
|
||||
#define UART_BRR_SAMPLING16(_PCLK_, _BAUD_) ((UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) << 4U) + \
|
||||
(UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0xF0U) + \
|
||||
(UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0x0FU))
|
||||
|
||||
#define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) ((uint32_t)((((uint64_t)(_PCLK_))*25U)/(2U*((uint64_t)(_BAUD_)))))
|
||||
#define UART_DIVMANT_SAMPLING8(_PCLK_, _BAUD_) (UART_DIV_SAMPLING8((_PCLK_), (_BAUD_))/100U)
|
||||
#define UART_DIVFRAQ_SAMPLING8(_PCLK_, _BAUD_) ((((UART_DIV_SAMPLING8((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) * 100U)) * 8U)\
|
||||
+ 50U) / 100U)
|
||||
/* UART BRR = mantissa + overflow + fraction
|
||||
= (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07U) */
|
||||
#define UART_BRR_SAMPLING8(_PCLK_, _BAUD_) ((UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) << 4U) + \
|
||||
((UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0xF8U) << 1U) + \
|
||||
(UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0x07U))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
/** @defgroup UART_Private_Functions UART Private Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F4xx_HAL_UART_H */
|
||||
|
||||
2521
Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usart.h
Normal file
2521
Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usart.h
Normal file
File diff suppressed because it is too large
Load Diff
3807
Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c
Normal file
3807
Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c
Normal file
File diff suppressed because it is too large
Load Diff
@@ -9,31 +9,48 @@ CAN1.CalculateTimeBit=1000
|
||||
CAN1.CalculateTimeQuantum=71.42857142857143
|
||||
CAN1.IPParameters=CalculateTimeQuantum,CalculateTimeBit,CalculateBaudRate,Prescaler,BS1,BS2
|
||||
CAN1.Prescaler=3
|
||||
Dma.Request0=USART3_RX
|
||||
Dma.RequestsNb=1
|
||||
Dma.USART3_RX.0.Direction=DMA_PERIPH_TO_MEMORY
|
||||
Dma.USART3_RX.0.FIFOMode=DMA_FIFOMODE_DISABLE
|
||||
Dma.USART3_RX.0.Instance=DMA1_Stream1
|
||||
Dma.USART3_RX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE
|
||||
Dma.USART3_RX.0.MemInc=DMA_MINC_ENABLE
|
||||
Dma.USART3_RX.0.Mode=DMA_CIRCULAR
|
||||
Dma.USART3_RX.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
|
||||
Dma.USART3_RX.0.PeriphInc=DMA_PINC_DISABLE
|
||||
Dma.USART3_RX.0.Priority=DMA_PRIORITY_VERY_HIGH
|
||||
Dma.USART3_RX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
|
||||
FREERTOS.FootprintOK=true
|
||||
FREERTOS.IPParameters=Tasks01,FootprintOK
|
||||
FREERTOS.Tasks01=CAN_Receive_Tas,40,128,StartCAN_Receive_Task,Default,NULL,Dynamic,NULL,NULL;Chassis_Control,24,128,StartChassis_Control_Task,Default,NULL,Dynamic,NULL,NULL
|
||||
FREERTOS.IPParameters=Tasks01,FootprintOK,Queues01
|
||||
FREERTOS.Queues01=chassis_speed_queue,5,uint16_t,0,Static,chassis_speed_queueBuffer,chassis_speed_queueControlBlock
|
||||
FREERTOS.Tasks01=CAN_Receive_Tas,40,128,StartCAN_Receive_Task,Default,NULL,Dynamic,NULL,NULL;Chassis_Control,24,128,StartChassis_Control_Task,Default,NULL,Dynamic,NULL,NULL;Command_Task,24,128,StartCommand_Task,Default,NULL,Dynamic,NULL,NULL
|
||||
File.Version=6
|
||||
GPIO.groupedBy=Group By Peripherals
|
||||
KeepUserPlacement=false
|
||||
Mcu.CPN=STM32F407IGH6TR
|
||||
Mcu.Family=STM32F4
|
||||
Mcu.IP0=CAN1
|
||||
Mcu.IP1=FREERTOS
|
||||
Mcu.IP2=NVIC
|
||||
Mcu.IP3=RCC
|
||||
Mcu.IP4=SYS
|
||||
Mcu.IPNb=5
|
||||
Mcu.IP1=DMA
|
||||
Mcu.IP2=FREERTOS
|
||||
Mcu.IP3=NVIC
|
||||
Mcu.IP4=RCC
|
||||
Mcu.IP5=SYS
|
||||
Mcu.IP6=USART3
|
||||
Mcu.IPNb=7
|
||||
Mcu.Name=STM32F407I(E-G)Hx
|
||||
Mcu.Package=UFBGA176
|
||||
Mcu.Pin0=PA14
|
||||
Mcu.Pin1=PA13
|
||||
Mcu.Pin2=PD0
|
||||
Mcu.Pin3=PD1
|
||||
Mcu.Pin4=PH0-OSC_IN
|
||||
Mcu.Pin5=PH1-OSC_OUT
|
||||
Mcu.Pin6=VP_FREERTOS_VS_CMSIS_V2
|
||||
Mcu.Pin7=VP_SYS_VS_tim6
|
||||
Mcu.PinsNb=8
|
||||
Mcu.Pin3=PC11
|
||||
Mcu.Pin4=PC10
|
||||
Mcu.Pin5=PD1
|
||||
Mcu.Pin6=PH0-OSC_IN
|
||||
Mcu.Pin7=PH1-OSC_OUT
|
||||
Mcu.Pin8=VP_FREERTOS_VS_CMSIS_V2
|
||||
Mcu.Pin9=VP_SYS_VS_tim6
|
||||
Mcu.PinsNb=10
|
||||
Mcu.ThirdPartyNb=0
|
||||
Mcu.UserConstants=
|
||||
Mcu.UserName=STM32F407IGHx
|
||||
@@ -41,6 +58,7 @@ MxCube.Version=6.15.0
|
||||
MxDb.Version=DB.6.0.150
|
||||
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
|
||||
NVIC.CAN1_RX0_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
|
||||
NVIC.DMA1_Stream1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
|
||||
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
|
||||
NVIC.ForceEnableDMAVector=true
|
||||
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
|
||||
@@ -56,11 +74,16 @@ NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:true\:false
|
||||
NVIC.TIM6_DAC_IRQn=true\:15\:0\:false\:false\:true\:false\:false\:true\:true
|
||||
NVIC.TimeBase=TIM6_DAC_IRQn
|
||||
NVIC.TimeBaseIP=TIM6
|
||||
NVIC.USART3_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
|
||||
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
|
||||
PA13.Mode=Serial_Wire
|
||||
PA13.Signal=SYS_JTMS-SWDIO
|
||||
PA14.Mode=Serial_Wire
|
||||
PA14.Signal=SYS_JTCK-SWCLK
|
||||
PC10.Mode=Asynchronous
|
||||
PC10.Signal=USART3_TX
|
||||
PC11.Mode=Asynchronous
|
||||
PC11.Signal=USART3_RX
|
||||
PD0.Locked=true
|
||||
PD0.Mode=CAN_Activate
|
||||
PD0.Signal=CAN1_RX
|
||||
@@ -104,7 +127,7 @@ ProjectManager.ToolChainLocation=
|
||||
ProjectManager.UAScriptAfterPath=
|
||||
ProjectManager.UAScriptBeforePath=
|
||||
ProjectManager.UnderRoot=false
|
||||
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_CAN1_Init-CAN1-false-HAL-true
|
||||
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_CAN1_Init-CAN1-false-HAL-true,5-MX_USART3_UART_Init-USART3-false-HAL-true
|
||||
RCC.48MHZClocksFreq_Value=84000000
|
||||
RCC.AHBFreq_Value=168000000
|
||||
RCC.APB1CLKDivider=RCC_HCLK_DIV4
|
||||
@@ -138,6 +161,10 @@ RCC.VCOI2SOutputFreq_Value=384000000
|
||||
RCC.VCOInputFreq_Value=2000000
|
||||
RCC.VCOOutputFreq_Value=336000000
|
||||
RCC.VcooutputI2S=192000000
|
||||
USART3.BaudRate=100000
|
||||
USART3.IPParameters=VirtualMode,BaudRate,Parity
|
||||
USART3.Parity=PARITY_EVEN
|
||||
USART3.VirtualMode=VM_ASYNC
|
||||
VP_FREERTOS_VS_CMSIS_V2.Mode=CMSIS_V2
|
||||
VP_FREERTOS_VS_CMSIS_V2.Signal=FREERTOS_VS_CMSIS_V2
|
||||
VP_SYS_VS_tim6.Mode=TIM6
|
||||
|
||||
@@ -26,6 +26,8 @@ set(MX_Application_Src
|
||||
${CMAKE_CURRENT_SOURCE_DIR}/../../Core/Src/gpio.c
|
||||
${CMAKE_CURRENT_SOURCE_DIR}/../../Core/Src/freertos.c
|
||||
${CMAKE_CURRENT_SOURCE_DIR}/../../Core/Src/can.c
|
||||
${CMAKE_CURRENT_SOURCE_DIR}/../../Core/Src/dma.c
|
||||
${CMAKE_CURRENT_SOURCE_DIR}/../../Core/Src/usart.c
|
||||
${CMAKE_CURRENT_SOURCE_DIR}/../../Core/Src/stm32f4xx_it.c
|
||||
${CMAKE_CURRENT_SOURCE_DIR}/../../Core/Src/stm32f4xx_hal_msp.c
|
||||
${CMAKE_CURRENT_SOURCE_DIR}/../../Core/Src/stm32f4xx_hal_timebase_tim.c
|
||||
@@ -52,7 +54,8 @@ set(STM32_Drivers_Src
|
||||
${CMAKE_CURRENT_SOURCE_DIR}/../../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c
|
||||
${CMAKE_CURRENT_SOURCE_DIR}/../../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c
|
||||
${CMAKE_CURRENT_SOURCE_DIR}/../../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c
|
||||
${CMAKE_CURRENT_SOURCE_DIR}/../../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c
|
||||
${CMAKE_CURRENT_SOURCE_DIR}/../../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c
|
||||
${CMAKE_CURRENT_SOURCE_DIR}/../../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c
|
||||
)
|
||||
|
||||
# Drivers Midllewares
|
||||
|
||||
Reference in New Issue
Block a user